commit:6810fa62f2b511c6040e207b6fa145c7779f8654
author:Chip
committer:Chip
date:Sun Mar 30 21:47:39 2025 -0500
parents:39d9edd8256c7b02c27210e9d40b561914e3f6bd
Finished opcode encodings
diff --git a/opcode.pas b/opcode.pas
line changes: +80/-11
index e0a5537..541bbce
--- a/opcode.pas
+++ b/opcode.pas
@@ -39,7 +39,7 @@ EncAA = (Base, BaseOffset, BaseIndex, BaseIndexIncrement);
 EncMM = (mGA, mGB, mGC, mPP);
 
 OperandType = (OpUnknown, OpRegister, OpPointer, OpImmediate, OpLocation,
-               OpMemory, OpBit, OpAbsent);
+               OpMemory, OpBit, OpWidth, OpAbsent);
 OperandSet = set of OperandType;
 Operand = record
     case Kind: OperandType of
@@ -54,6 +54,7 @@ Operand = record
             offset: Word;
         );
         OpBit: (bit: EncBBB);
+        OpWidth: (width: Byte);
 end;
 
 InstructionRBP = (
@@ -63,23 +64,25 @@ InstructionRBP = (
     rbpNone,   { RbP encodes nothing (0b000) }
     rbpHlt,    { RbP encodes 0b001 }
     rbpSintr,  { RbP encodes 0b010 }
-    rbpJmp     { RbP encodes 0b100 }
+    rbpJmp,    { RbP encodes 0b100 }
+    rbpWid,    { RbP encodes logical widths }
+    rbpXfer    { RbP encodes 0b011 }
 );
 InstructionWidth = (widByte, widWord);
 { |        low order byte         |        high order byte        | }
 { | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | }
-{ |   r/b/P   |  W B  |  A A  | W |        OPCODE         |  MM   | }
+{ |   R/b/P   |  W B  |  A A  | W |        OPCODE         |  MM   | }
 {                                                                   }
-{ r/b/P = Register, Bit, or Pointer/Register Select                 }
+{ R/b/P = Register, Bit, or Pointer/Register Select                 }
 {     RRR         bbb            PPP                                }
 {     000 - GA    000 - bit 0    000 - GA                           }
 {     001 - GB    001 - bit 1    001 - GB                           }
 {     010 - GC    010 - bit 2    010 - GC                           }
-{     011 - GA    011 - bit 3    100 - TP                           }
-{     100 - GA    100 - bit 4                                       }
-{     101 - GA    101 - bit 5                                       }
-{     110 - GA    110 - bit 6                                       }
-{     111 - GA    111 - bit 7                                       }
+{     011 - BC    011 - bit 3    100 - TP                           }
+{     100 - TP    100 - bit 4                                       }
+{     101 - IX    101 - bit 5                                       }
+{     110 - CC    110 - bit 6                                       }
+{     111 - MC    111 - bit 7                                       }
 {                                                                   }
 { WB = Number of immediate/displacement value bytes  (EncWB)        }
 {     00 - Reserved              (wReserved)                        }
@@ -117,7 +120,7 @@ InstructionEncoding = record
     rbp: InstructionRBP;
 end;
 
-const IEnc: array[0..29] of InstructionEncoding = (
+const IEnc: array[0..79] of InstructionEncoding = (
     (m: mADD;   o1: OpRegister; o2: OpMemory;    o3: OpAbsent;
         op: $A0;   w: widWord;     wb: wReserved;   rbp: rbpReg),
 
@@ -286,14 +289,80 @@ const IEnc: array[0..29] of InstructionEncoding = (
         op: $90;   w: widByte;     wb: wReserved;   rbp: rbpNone),
     { MOVB M, M works just like MOV with a different W field. }
 
+    (m: mMOVBI;   o1: OpRegister; o2: OpImmediate; o3: OpAbsent;
+        op: $30;   w: widByte;     wb: wOne;        rbp: rbpReg),
+
+    (m: mMOVBI;   o1: OpMemory;   o2: OpImmediate; o3: OpAbsent;
+        op: $4C;   w: widByte;     wb: wOne;        rbp: rbpNone),
+
     (m: mMOVI;   o1: OpRegister; o2: OpImmediate; o3: OpAbsent;
         op: $30;   w: widWord;     wb: wTwo;        rbp: rbpReg),
     
     (m: MMOVI;   o1: OpMemory;   o2: OpImmediate; o3: OpAbsent;
         op: $4C;   w: widWord;     wb: wTwo;        rbp: rbpNone),
 
+    (m: mMOVP;   o1: OpMemory;   o2: OpPointer;   o3: OpAbsent;
+        op: $98;   w: widWord;     wb: wReserved;   rbp: rbpPtrReg),
+
+    (m: mMOVP;   o1: OpPointer;  o2: OpMemory;    o3: OpAbsent;
+        op: $8C;   w: widWord;     wb: wReserved;   rbp: rbpPtrReg),
+
+    (m: mNOP;    o1: OpAbsent;   o2: OpAbsent;    o3: OpAbsent;
+        op: $00;   w: widByte;     wb: wReserved;   rbp: rbpNone),
+
+    (m: mNOT;    o1: OpRegister; o2: OpAbsent;    o3: OpAbsent;
+        op: $2C;   w: widByte;     wb: wReserved;   rbp: rbpReg),
+
+    (m: mNOT;    o1: OpMemory;   o2: OpAbsent;    o3: OpAbsent;
+        op: $DC;   w: widWord;     wb: wReserved;   rbp: rbpNone),
+
+    (m: mNOT;    o1: OpRegister; o2: OpMemory;    o3: OpAbsent;
+        op: $AC;   w: widWord;     wb: wReserved;   rbp: rbpReg),
+
+    (m: mNOTB;   o1: OpMemory;   o2: OpAbsent;    o3: OpAbsent;
+        op: $DC;   w: widByte;     wb: wReserved;   rbp: rbpNone),
+
+    (m: mNOTB;   o1: OpRegister; o2: OpMemory;    o3: OpAbsent;
+        op: $AC;   w: widByte;     wb: wReserved;   rbp: rbpReg),
+
+    (m: mOR;     o1: OpRegister; o2: OpMemory;    o3: OpAbsent;
+        op: $A4;   w: widWord;     wb: wReserved;   rbp: rbpReg),
+
+    (m: mOR;     o1: OpMemory;   o2: OpRegister;  o3: OpAbsent;
+        op: $D4;   w: widWord;     wb: wReserved;   rbp: rbpReg),
+
+    (m: mORB;    o1: OpRegister; o2: OpMemory;    o3: OpAbsent;
+        op: $A4;   w: widByte;     wb: wReserved;   rbp: rbpReg),
+
+    (m: mORB;    o1: OpMemory;   o2: OpRegister;  o3: OpAbsent;
+        op: $D4;   w: widByte;     wb: wReserved;   rbp: rbpReg),
+
+    (m: mORBI;   o1: OpRegister; o2: OpImmediate; o3: OpAbsent;
+        op: $24;   w: widByte;     wb: wOne;        rbp: rbpReg),
+
+    (m: mORBI;   o1: OpMemory;   o2: OpImmediate; o3: OpAbsent;
+        op: $C4;   w: widByte;     wb: wOne;        rbp: rbpNone),
+
+    (m: mORI;    o1: OpRegister; o2: OpImmediate; o3: OpAbsent;
+        op: $24;   w: widWord;     wb: wTwo;        rbp: rbpReg),
+
+    (m: mORI;    o1: OpMemory;   o2: OpImmediate; o3: OpAbsent;
+        op: $C4;   w: widWord;     wb: wTwo;        rbp: rbpNone),
+
+    (m: mSETB;   o1: OpMemory;   o2: OpBit;       o3: OpAbsent;
+        op: $F4;   w: widByte;     wb: wReserved;   rbp: rbpBit),
+
     (m: mSINTR;  o1: OpAbsent;   o2: OpAbsent;    o3: OpAbsent;
-        op: $00;   w: widByte;     wb: wReserved;   rbp: rbpSintr)
+        op: $00;   w: widByte;     wb: wReserved;   rbp: rbpSintr),
+
+    (m: mTSL;    o1: OpMemory;   o2: OpImmediate; o3: OpLocation;
+        op: $94;   w: widByte;     wb: wTSL;        rbp: rbpNone),
+
+    (m: mWID;    o1: OpWidth;    o2: OpWidth;     o3: OpAbsent;
+        op: $00;   w: widByte;     wb: wReserved;   rbp: rbpWid),
+
+    (m: mXFER;   o1: OpAbsent;   o2: OpAbsent;    o3: OpAbsent;
+        op: $00;   w: widByte;     wb: wReserved;   rbp: rbpXfer)
 );
 
 procedure GetMnemonicEncodingBounds(const m: Mnemonic; var i, j: Integer);